Hardware review for KiCad · schematic + PCB
Know your board is ready for fab before you order it.
BoardLab reads your schematic, layout and datasheets, checks every part and every interface, and gives you a verdict backed by evidence. Then it helps you design the hard parts: DDR memory routing and RF antenna placement.
Your first board up to 30 ICs is analysed free. Pricing · A real board, reviewed
Seven tools, one project.
Schematic and PCB analysis
Verdict, functional map, X-ray, coverage, temperature and EMI risk, with the proof behind every finding.
AvailableU2Protocol certifier
USB 2.0, I²C and the other recognised interfaces, measured on real copper.
AvailableU3DDR3 / DDR4 Assistant
From placement to fly-by routing with picosecond matching. A new router is in development.
AvailableU4Antenna RF Assistant
The DDR Assistant method for antennas: vendor keep-out rules, ranked placement proposals, KiCad export.
AvailableU5Teams
Stable teams with roles you define, activities per member and sign-off before fab.
AvailableU6KiCad integration
Native KiCad files, plus a two-way plugin: send the board, fix findings, receive the changes. EasyEDA Pro boards too, by upload or extension.
AvailableU7Layout page
Every layout change from the tools in one list, approved and sent to KiCad as one changeset.
NewU1 · Schematic and PCB analysis
One question: can it be ordered?
Upload your KiCad files and BoardLab cross-checks the netlist, the layout and every part's datasheet. Each issue becomes a concrete task, grouped by the kind of change it needs, and each task carries its evidence chain: the measured fact, the datasheet rule, the inference and the action.
Datasheets actually read
The parser extracts limits, pins and typical conditions from the PDFs, and every rule cites the page it came from.
Schematic and layout together
Rail current, derating, ESD, impedance, ground returns and copper geometry in one merged report.
Report and ECO ready
A nine-section Markdown report and an ECO CSV with only the fixes marked as applied.
Board temperature map
Every IC's junction temperature from its datasheet thermal data, the project's ambient and the heat of its neighbours, solved on the copper with a 2D field model.
EMI risk map
Advisory map of the risky zones: near-field coupling, crosstalk, antenna fields, shared ground and return paths over plane gaps, overlaid on the X-ray. It warns, it does not certify.
Schematic first, PCB when ready
At upload choose the schematic alone or schematic then PCB in one go. A progress bar with the remaining time and an email when it ends, on by default.
U2 · Protocol certifier
Certified interfaces, with the numbers.
BoardLab recognises the standard interfaces on your board and checks them against the protocol's requirements: topology, terminations, pull-ups, differential impedance measured on the actual traces. If a single piece of data is missing, the interface is not certified.
DDR1 to DDR5, to JEDEC
Memory interfaces are checked against the official JEDEC JESD79 specifications, with every rule citing its table and page.
Supplies included
VDD, VDDQ and VPP are graded on the JEDEC window. Where JEDEC gives none, the DRAM datasheet window is used and labelled as such.
No assumed delays
A package delay that is not on file is reported as missing, never counted as 0 ps, so timing is never certified on a guess.
U3 · DDR3 / DDR4 Assistant
Memory routing, planned.
The DDR Assistant starts from your FPGA or processor and your memory chips, proposes where to place them, then routes the bus to the vendor's and the controller's rules. Every length is measured in picoseconds on the declared stackup.
- PlacementCPU/DRAM placement proposals; you pick the one to route on.
- Bundle planByte lanes with DQS, fly-by address and command, layers and corridors assigned before routing.
- RoutingNative Rust A* with congestion negotiation and a genetic search over permutations.
- Matching and checksps tolerances per byte and per group, VTT terminations, copper DRC, impedance from a 2D field solver.
- ExportPDF with per-byte and per-layer tables, images and KiCad files.
One stackup, said out loud
Analysis, impedance, the DDR planner and the certifier use the same stackup: the one you declare in the project settings, otherwise PCBWay's standard for the layer count (2, 4, 6 or 8 layers). The stackup written in the .kicad_pcb is never used silently, and the report says which one was used and where it came from.
BGA corridors at BGA rules
Between the balls of a BGA, a corridor is sized with the inside-BGA trace width and spacing, differential pairs included, with no routing grid. On an MT41J DDR3 the centre corridor carries its 11 lines per inner layer: 2.36 of 3.6 mm at 0.1 / 0.1 mm.
A summary first
The planner opens on a summary: the stackup in use, the choices it made, the first advice and an X-ray of the buses, before any route.
U4 · Antenna RF Assistant
AvailableAfter DDR, the antenna.
The antenna assistant follows the DDR Assistant's method: rules with a source, placement proposals you choose from, and checks that fail closed when a rule has no limit or no measurement.
- Finds RF modules and antennas: Espressif modules with rules cited from their Hardware Design Guidelines, plus any KiCad footprint with an antenna keep-out
- Checks placement: no board under the antenna, keep-out clearance, corner and edge reach, enclosure gap
- Proposes ranked placements along the board edges, each with the work it needs
- Exports the chosen placement as a .kicad_pcb with the keep-out zone, tested in KiCad 10
U5 · Teams
Your team, set up once.
A team now lives at account level. Its manager adds members by email, even before they have an account, and defines the roles as sets of permissions. Link the team to a project and everyone is in, with the role it gives them. Change a role and it applies at once on every linked project. Comments, @mentions and the project diary keep the whole review on record.
Team · Hardware · linked to Sensor node rev B
Roles and permissions · edited by the manager
| Role | read | comment | decide | edit | run | sign | release | manage |
|---|---|---|---|---|---|---|---|---|
| Hardware lead | ● | ● | ● | ● | ● | ● | ● | ● |
| Layout review | ● | ● | ● | · | · | ● | · | · |
| Firmware | ● | ● | ● | · | · | · | · | · |
| Production | ● | · | · | · | · | · | ● | · |
| Viewer | ● | · | · | · | · | · | · | · |
Roles you define
Read, comment, decide, edit, run, sign, release, manage: build each role from these permissions, or start from the reviewer and viewer templates.
Activities per member
Give a member stages or finding domains. Their role narrows to those, and the Review gets a My activity filter.
Signed before fab
With per-activity sign-off on, the board waits until each member with an activity has signed the current report.
Names, roles and activities in the panels are illustrative.
U7 · Layout page New
Every layout change, in one list.
Each project has a Layout page, under Tools. It launches the layout tools, the DDR planner and the antenna assistant, and collects what they propose as changes on one version of the board. You approve them, put them in order and see them drawn over the board in the X-ray. The approved changes go to KiCad as one changeset through the BoardLab Sync plugin.
Layout changes · Sensor node rev B · board v4
Board versions
Conflicts caught
The same part moved twice or the same net routed twice is flagged in the list, so you choose before anything reaches KiCad.
Written into KiCad
Plugin 26.11.2 writes the approved changes, BoardLab keep-out zones included, after a preview and a backup, as one step you can undo.
Next: BGA fan-out In development
Dog-bones and via-in-pad for BGA fan-out, proposed on the Layout page and written into KiCad by the plugin like the other changes.
Names and changes in the panels are illustrative.
U6 · KiCad integration
KiCad and BoardLab, both ways.
BoardLab already reads your KiCad project as it is: schematic sheets, PCB and project file, with no export step. The BoardLab Sync plugin for KiCad 10 turns that into a loop. Send the open board from KiCad, fix the findings with your team on BoardLab, and receive the changes back into the same board.
In KiCad · BoardLab Sync plugin
On boardlab.it · the team
Download the KiCad pluginSetup guideInstall it in KiCad 10 with Plugin and Content Manager > Install from File…, without unzipping it. The setup guide needs a free account. Linking always goes through the website, so a plugin never reaches a project without your confirmation there.
EasyEDA Pro New
EasyEDA boards, same analysis.
Upload the EasyEDA Pro project file (.epro or .epro2), or send it from EasyEDA with the BoardLab extension (.eext), built only on EasyEDA's official extension API. Board, netlist and BOM with LCSC codes come from the same file. The board is converted once into the same model as KiCad boards, so every analysis runs unchanged, and the upload is refused if any pad moves or changes net.
Linked from the website
The extension is linked to a project with a code created on the project's Upload page, as with KiCad.
Findings on the board
In EasyEDA the findings are listed, and the one you pick highlights its parts and net on the board.
Read only, for now
The extension does not write into the EasyEDA board yet. Sending changes back, as KiCad's Update board does, is planned for a later version.
EasyEDA setup guideThe guide and the extension download need a free account. Install the .eext in EasyEDA Pro without unzipping it.